P.84

程式碼
module top;
reg A,B;
wire y_out;
connet_1 m1(y_out,A,B);
initial
begin
A=0;
B=0;
#2000 $finish;
end
always
#50 A=~A;
always
#25 B=~B;
endmodule

module connet_1(y_out,A,B);
input A,B;
output y_out;
wire y1;
not (y1,A);
nand (y_out,y1,B);
endmodule