NAND delay

程式碼
module top;
reg A1,B1;
wire o;
nanf201 G1(o,A1,B1);
initial
begin
A1=0;
B1=0;
#500 $finish;
end
always
#50 A1=~A1;
always
#30 B1=~B1;
endmodule
module nanf201(o,A1,B1);
input A1,B1;
output o;
nand(o,A1,B1);
specify
specparam
Tpd_0_1=1.13:3.09:7.75,
Tpd_1_0=0.93:2.5:7.34;
(A1=>o)=(Tpd_0_1,Tpd_1_0);
(B1=>o)=(Tpd_0_1,Tpd_1_0);
endspecify
endmodule
===================================================================
這次實作讓我暸解訊號的delay如何運作